• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    In a printed circuit board (1) thermal vias (19) between the bottom (A) and an upper side (B) of the support plate (10) of the circuit board formed by the following steps: applying each a solder mask (21, 31) on the bottom (A ) and the top (B); Applying solder to the underside (A) and reflowing the solder, the solder penetrating into the bores (20) and forming on the underside (A) convex menisci (26) projecting beyond the edge (22) of the respective bores; and creating areas (35) on the top side (B) which areas of solder stop material are exposed and intended to contact at least one electronic component (17) on the top and each comprise at least one of the thermal vias. Subsequently, the upper side (B) can be equipped with electrical components (17) on these areas (35). The first solder mask (21) has in each case around the edge of each bore (20) on the underside a free of solder resist area (23).
    公开号:AT520301A4
    申请号:T50871/2017
    申请日:2017-10-12
    公开日:2019-03-15
    发明作者:Edlinger Erik
    申请人:Zkw Group Gmbh；
    IPC主号:
    专利说明:

    Method for producing a printed circuit board with thermal vias, and printed circuit board
    The invention relates to a method for producing thermal vias in a printed circuit board, starting from a carrier plate having a plurality of preformed therein bores, which are formed between the underside and the top of the carrier plate and located at positions where each thermal vias are to be generated.
    Likewise, the invention relates to a printed circuit board with a plurality of formed in a support plate of the circuit board thermal vias, which extend along bores formed between the bottom and the top of the support plate.
    Circuit boards of the type considered here are widely used in the electronics industry. They include a carrier plate, which carries a number of electronic components - hereinafter usually "electronic components" or "components" for short - carries, usually on one side of the carrier plate. The term "electronic component" is to be understood to include any electrical components that may be in electrical connection with tracks, such as chips that include integrated circuits, digital or analog processors, but also simpler components, such as LEDs,
    Resistors and the like. More.
    The component-carrying side of the circuit board or carrier plate is referred to in the context of this disclosure as "top side", and the side opposite this side is referred to as "bottom side". Electrical connection lines for the components and possibly other electrical installations may be located on both sides of the circuit board, typically predominantly on the underside. In a printed circuit board which has a two-sided assembly with components, in this disclosure, the side which is first equipped with components, referred to as "bottom." In special cases, it can also be provided that for various areas of the support plate, the roles of sub - And top are reversed, for example, if components in certain areas preferably on the opposite side (which is then considered in these areas as the top, otherwise as the bottom) are to be mounted.
    The body of the backing plate is conventionally made of a plastic or composite material such as e.g. FR4, an epoxy resin fiberglass material; suitable printed circuit board materials are known per se.
    Terms relating to location or orientation, such as "top", "bottom", "front", "below", "above", etc., are chosen in the description for convenience only and are primarily directed to the illustration in FIG In particular, the terms top and bottom in this specification and claims are intended merely to identify the sides of a carrier plate and are not to be construed as limiting , as vice versa, standing or obliquely used or installed in devices.
    Since the components generate heat due to unavoidable power losses during operation, it is also generally necessary to ensure sufficient dissipation of the heat in order to avoid damage to the components up to their destruction. Only in very simple cases, cooling by ambient air and heat conduction in the circuit board is sufficient; In most cases, additional measures for passive or active cooling must be taken. A known approach to heat dissipation of thermally stressed components are thermal vias; These are often called "thermal vias" or (English) "thermal vias", often just "vias" for short. A via provides a thermally (and usually also electrically) conductive connection from the top of the board to the bottom to facilitate heat transfer across the board and to bridge the thermal resistance of the board material.
    The industrial applications often provide on both sides a very dense assembly of the printed circuit board. If you would like to thermally optimize such a printed circuit board and use via vias for this purpose, it is often necessary for these vias to be located directly under a component, for example because the vias are intended to cool the component directly or otherwise there is no room for vias. In this case, the problem usually arises that during a soldering pass in which a component for the second side is to be equipped on the back side of a through-connection soldered (already soldered from the front side) or soldered, due to the unevenness which causes the through-connection , a orders of the solder for the soldering process, for example by means of paste printing, not or only with difficulty possible and / or the components to be assembled can not be placed in a well-defined manner.
    Well-known solutions for the production of vias provide for the filling with copper or epoxy pastes. However, these filled vias are associated with a significant overhead and concomitant increased costs. As an alternative, it is known to leave the vias without filling; However, unfilled vias are unsatisfactory because of the lower heat conduction.
    It is therefore an object of the present invention to provide a method for the production of printed circuit boards with vias, which is process stable, reliable and yet cost-effective, even if the vias are set tight and on positions where also electronic components are mounted (populated).
    This object is achieved by a method of the type mentioned at the outset, comprising the following steps: applying a first and a second solder mask to the underside and the top, wherein the first solder mask in the preformed holes respectively around the edge of each hole on the bottom a solder resist-free area, wherein the second solder mask extends at least a majority, preferably at each, the preformed holes each at least up to the edge of the bore on the top, which does not rule out that the second solder mask beyond the edge in the Area of the opening protrudes; - Applying solder on the bottom and reflow soldering of the solder, wherein the solder penetrates into the holes and on the bottom convex, the edge of the respective bores superior Menisken formed; and - exposing areas on the top, which areas are predetermined for contacting at least one electronic component on the top and each comprise at least one of the thermal vias, by removing the second solder mask at least in said areas.
    This technical solution results in a manufacturing process that enables vias to be process stable in the soldering process - i. while avoiding solder balls, which can lead to creepage currents or short circuits, and other form deviations of the solder material - fill with solder and perform the assembly of components on already filled vias. The use of solder as a filling material of the vias provides a high heat conduction through the vias, which is significantly higher than that of copper or other pastes. The invention also provides for a subsequent solder-break release after a first reflow soldering operation, thereby enabling the definition of solder pads ("pads") for assembling the components. This technical solution also results in a better quality of placement on the filled vias, with tilting the components or insufficient paste pressure can be avoided.
    According to a preferred embodiment of the method according to the invention, it is advantageous if in the first solder mask the areas free of solder resist are designed in an annular manner. In many cases, it is also advantageous if the areas of immediately adjacent holes which are free of solder resist touch one another, whereby areas with solder mask are formed between the free areas, which areas preferably have the form of quadrilaterals or triangles delimited by concave curve segments.
    In order to facilitate the implementation of the release on the top and to increase the tolerance for inaccuracies of the positioning of the mask on the top, it may be useful if the second solder mask extends at least a portion of said holes over the edge and there each a freestanding inward protruding ring forms. This also results in a better definition of the solder edge at the respective opening to the top and in particular prevents unwanted outflow of the solder.
    Alternatively it can be provided that the second solder mask at at least a portion of said holes to almost reaches the edge or, preferably, is aligned with the edge of the bore. This results in a more economical use of the solder stop material and facilitates the subsequent processing of the solder mask for creating the Exemption areas. For easier handling of the soldering operation, it may be expedient if the support plate is kept oriented with the underside upwards during the step of applying solder.
    The method according to the invention can be supplemented by the subsequent additional step in which the upper side is equipped, namely with at least one component on the exposed areas for contacting.
    Furthermore, it is favorable if the menisci produced during the reflow soldering of the solder on the underside form convex calottes above the bores in each case. By the term meniscus is meant herein a curved surface of the (liquid or resolidified) solder, the shape of the meniscus preferably, but not necessarily, that of a dome - i. Kugelkalotte or ellipsoidal calotte - has, but in general also flattened, optionally also a little dented, may be, if appropriate for the particular application. The formation of the menisci as a dome at the same time gives a large surface of the menisci and a well-defined shape of the surface of the menisci, which facilitates the targeted design for heat dissipation. In addition, a large surface contributes to a better performance of the heat radiation, or heat dissipation, if e.g. later on the menisci heat-dissipating elements are applied via a thermal grease.
    In addition, the additional step of lining the preformed bores with a metal may be carried out in advance, preferably with a metal of high electrical conductivity, e.g. Copper; and preferably, this lining step may be by a galvanic process.
    In order to achieve a reliable backfilling of the vias early, it is advantageous if, during the reflowing of the solder, the holes into which the solder penetrates are filled up by the solder. Likewise, it is advantageous if the menisci are formed by solder material, which at the same time fills the holes. These embodiments result in vias with a particularly good thermal performance.
    Likewise, the object underlying the invention is achieved with a printed circuit board in which the thermal vias on the bottom have convex, the edge of the respective holes superior Meniscus, and provided on the top of a Lötstoppmaske exempt areas, which areas with soldering material for contacting at least one electronic component are provided on the upper side and are in soldered connection with at least one of the thermal vias.
    Further advantageous embodiments of the circuit board correspond to those resulting from the developments of the method according to the invention. In particular, in the printed circuit board also the menisci on the underside may be circular, wherein preferably the menisci of immediately adjacent holes touch each other, wherein between these meniscuses each areas with Lötstopplack lie, which preferably have the form of limited by concave curve segments squares or triangles.
    In summary, the invention achieves the following advantages: high thermal performance, only small additional costs by filling the vias, reliability of the filling for vias in pads, possibility of using the release also for other applications, a subsequent change of the solder mask is possible if required , and • the vias can be filled early with solder already during metallization (using HAL finish).
    The invention together with further advantages will be described below by way of example
    Embodiments explained, which are provided in the drawings. The drawings show in schematic form, with reference to a sequence of sectional views of the respective carrier plate shown:
    Fig. 1 shows a support plate of a first embodiment of the invention, wherein the support plate is temporarily reversed, so that its underside is turned upwards;
    Fig. 2, the carrier plate with applied solder masks, in one
    Sectional view in partial image (a) and in a plan view of the underside of the carrier plate in partial image (b);
    Fig. 3 illustrates the application and reflow soldering of solder;
    Fig. 4 shows the state achieved by the reflow soldering with filled holes in the carrier plate;
    Fig. 5 illustrates the following step of cropping areas on the topside, previously reversing the carrier plate;
    Fig. 6 illustrates the additional step of loading the carrier plate with electronic components;
    Fig. 7 shows the circuit board thus obtained; and
    Fig. 8 shows a carrier plate with solder masks according to a second embodiment of the invention.
    It should be understood that the embodiments described herein are for illustration only and are not to be construed as limiting the invention; rather fall under the scope of the invention, all embodiments, which the skilled person can find from the description, the scope of protection is defined by the claims.
    In the following figures, like reference numerals are used for the same or similar elements for ease of explanation and illustration. Further, the reference numerals used in the claims are intended to facilitate only the readability of the claims and the understanding of the invention, and in no way have a character which detracts from the scope of the invention.
    In Fig. 1, a support plate 101 is shown, which serves as a starting point for the manufacturing process in the first embodiment. The sectional views shown in Fig. 1 and the following figures correspond to a section through a series of holes, each along a sectional plane which corresponds to the sectional plane 2-2 in Fig. 2 (a), wherein in each case the same portion of the support plate in the successive Stages of the manufacturing process is shown.
    The support plate 101 includes a base plate 10, such as a single or multi-layered FR4 plate; FR4 plates as base plates for printed circuit boards are well known. The two
    Surfaces of the support plate correspond to a bottom A and a top B. It should be noted that in the illustrations of Figs. 1 to 4, the support plate is "turned" oriented, ie the bottom A is up and the top B facing down. As explained above, the upper side B is the side on which the electronic components are applied when the carrier plate is fitted on one side (see Fig. 6) Depending on the application layout of the printed circuit board to be produced, it can also be provided that the different areas of the carrier plate Rolls of the bottom and top are reversed, for example, if components are mounted in certain areas on the opposite side.
    In the base plate 10 of the support plate 101 a plurality of holes is formed, of which in Fig. 1, four holes 11,12,13,14 are shown representatively and which have been produced by means of a suitable known method. In general, the holes on the carrier plate are in a pre-determined, two-dimensional arrangement. The positions in the two-dimensional array are chosen according to the application and requirements at the locations where vias (thermal vias) are to be generated; However, the actual positions of the vias or holes are not relevant to the invention. The bores 11-14 (and also the bores 211-214 of FIG. 2 (b)) are each provided with their own reference numerals, but are made similar for the purposes of the present disclosure.
    The holes 11-14 are preferably, but not necessarily, provided with a metallic lining (coating) 15. The metallic material of the coating 15 preferably has a high electrical conductivity. Preferred materials are e.g. Copper, aluminum or carbon coating. This lining is, for example, produced immediately after the bores have been introduced into the base plate 10 by a suitable method known per se, e.g. a galvanic process. The liner 15 is shown in the drawings for clarity with exaggerated thickness.
    On the support plate 101 now solder resist masks 21,31 are applied on both sides. This results in the carrier plate 102 shown in FIG. 2 having a first solder mask 21 on the underside A of the carrier plate 102 and a second solder mask 31 on the top B of the carrier plate 102, as shown in the sectional view of FIG. 2 (a). The height of the solder masks 21, 31 is exaggerated in the figures for purposes of clarity and in many embodiments is significantly less than shown. In order to enable a flat filling of the vias in the later stage of the method, in the solder masks 21, 31 cut areas provided so that the solder masks each except at least areas that the openings of the holes 11-14 on the upper or. Correspond bottom side.
    In FIG. 2 (b), a section of the first solder mask 21 is shown in a plan view of the carrier plate 102. Each bore - in FIG. 2 (b), bores 211, 212, 213, 214 of a second row arranged parallel to one another are shown above the bores 11 - 14 - opens on the underside into an opening whose edge in FIG. 2 (FIG. b) is shown as a circle each: smaller circles 22. Around each of the edges 22, a Lötstopplack-exemption 23 is provided so that a free area up to an outer edge, shown as a larger circle 24 remains. Preferably, the relief areas 23 will, as far as possible and compatible with the intended electronic structure, placed so close together that the outer edges 24 of immediately adjacent holes 11,12, 212, 211 and 13,14, 214, 211 touch each other. In each case a non-wettable area 25 of the solder mask remains between such immediately adjacent holes; In the exemplary embodiment shown, this region 25 has the form of a rhombus or "check" shape These regions 25 are provided in order to limit the amount of solder received in the released regions in the later step and to better define the surface of the solder Generally, the shape of such a region bounded by a plurality of cropping areas corresponds to a "concave polygon", ie a polygon-like figure, which is formed from concave curve segments, in particular circular segments, usually a concave quadrangle or concave triangle. In the case of such a "concave polygon", therefore, the mentioned concave curves or circle segments occur instead of straight edges, but a ridge with one remains in advance between clearances which are provided for vias between which no electrical contact may occur in the electronic layout The value of the minimum width depends on lay out requirements, for example, a typical value is 100 pm, but may also be 50 pm or less Generally, a value is chosen that ensures electrical separation between the generated vias In these cases, the "concave polygons" at the tips, which lie between such electrically separated vias, run out into the said webs and are thus connected to one another by these webs.
    Also on the top - Lötstoppmaske 31 - are provided at the locations of the openings of the holes, corresponding to the edges 32, exemptions. Here, however, the clearance in the solder mask 31 on the upper side B is preferably made as small as possible; this is to avoid that solder material located in the holes after the first reflow soldering projects over the surface of the upper side (see Fig. 4). The solder mask 31 thus preferably extends at least as far as the edges 32 of the holes on the upper side B. In the embodiment shown, the release is such that the edge 33 of the second solder mask 31 is flush with the edge 32 of the bore. In this case, the edge 33 of the solder mask 31 corresponds to the hole edge 32 for each bore. Alternatively, in a variant not shown, a narrow release region may also be excluded around the edge 32, so that the edge of the solder mask comes close to the edge 32; the remaining distance to the edge 32 is small, so that the meniscus arising over the opening of the bore does not project beyond the surface of the top-side solder mask 31.
    Exemplary dimensions in the solder mask 21 are 0.7 mm diameter of the relief regions 23 with a diameter of the openings 22, 32 of 0.35 mm.
    In an advantageous embodiment variant, which is shown in a sectional view of a carrier plate 103 in FIG. 8, the solder stop mask on the upper side B can be modified so that the solder mask 38 projects beyond the edges 32 of the bores into the respective openings. The Lötstoppmaske 38 thus forms at these holes each have a freestanding inwardly projecting ring 34. This ring 34 prevents unwanted drainage of the solder, which could lead to unwanted voids in Via. Such projecting rings 34 may be provided in all holes or in part of the holes. Otherwise, the carrier plate 103 of FIG. 8 corresponds to the carrier plate 102 of FIG. 2.
    The vias are advantageously not sealed with solder mask because this avoids air pockets in the via and compromises efficient filling. The solder mask 31, 38 thus prevents solder from leaking beyond the openings, and at the same time allows outgassing of the flux through the remaining openings (according to edges 33 and 34, respectively). This provides for forming the vias without unwanted voids (voids).
    Referring to FIG. 3, in the next step, namely a first
    Reflow soldering pass, for example, by means of the known SMT method, applied to the bottom A Lot 16. In Fig. 3, the solder 16 is symbolically represented by a rectangle with broken hatching. Preferably, the support plate is kept oriented at least during this step with the underside A upwards. During the reflow soldering penetrates the solder 16 in the holes 11,12,13,14, where it penetrates to the edges of the solder masks 21, 31.
    The state of the support plate 104 thus obtained is shown in FIG. The solder advantageously penetrates on the underside A as far as the edges 24 of the clearing regions 23 of the solder mask 21, so that largely filled holes 30 are obtained. The solder 16 in this case forms menisci 26 on the regions 23, which project beyond the lower edges 22 of the bores 30. These meniscuses 26 are preferably shaped by a suitable choice of solder material and amount to form many small "hills" in the form of convexes, resulting in an increased surface area of the menisci, which improves the dissipation of heat Menisci 26 naturally correspond in arrangement to the disposition zones 23 (see Fig. 2 (b)), so that they preferably contact each other, whereas between the meniscuses 26 the above-described areas 25 are left with solder mask.
    Optionally, according to a variant of the method during the first reflow soldering pass of FIGS. 3 and 4 at the same time components (not shown) on the underside A are fitted.
    On the other hand, on the top B, such menisci are possible at this stage, but not required, in view of the later soldering pass for the top, as described below.
    Referring to Fig. 5, there is then a step of clearing areas 35 on the top B. For this purpose, it is usually appropriate that the carrier plate is turned beforehand, so that from now on the top B faces upwards. The areas 35 are determined in advance and correspond to those areas on which electronic components are contacted in the subsequent step. At least some of the regions 35 in this case also include the locations of one or more of the previously produced filled-in cells
    Bores 30.
    This step of blanking serves to make the areas 35 free of solder mask. For this purpose, those parts of the solder mask 31 which are located in the regions 35 are removed by means of suitable known methods C, for example by a chemical or plasma-chemical etching method of known type, by means of lithographic methods, or using a marking laser C. Outside of these regions 35 remains more expedient Make the solder stop of the thus processed solder mask 37.
    Then, as shown in Fig. 6, in the next step, a second Aufschmelzlöt pass on the top B, for example by means of the known SMT method.
    Here, the top is again printed in a conventional manner with solder material 36 and equipped with components; Fig. 6 representatively shows a component 17 for a generally arbitrary number of components. The solder 36 thus penetrates during the reflow soldering in the exposed areas 35 and connects on the other hand with the contact surfaces 18 of the components 17. This results in a direct connection of the contact surfaces 18 with the filled holes 20th
    At the locations of the bores 20, a number of vias 19 are now formed, which are filled with solder material, the uninterrupted up to the contact surfaces 18 of the components 17 on the top B (and optionally the bottom Not shown) and thus ensures good thermal and optionally electrical contacting of the components.
    The method according to the invention thus makes it possible for vias 19 to have a position directly underneath components 17 and yet be able to be filled selectively, without having to accept any impairment of the paste pressure in the SMT process or tilting of the components 17.
    权利要求:
    Claims (13)
    [1]
    claims
    A method of producing thermal vias (19) in a printed circuit board starting from a carrier plate (101) having a plurality of preformed holes (11, 12, 13, 14) formed between a bottom (A) and a top (B ) of the carrier plate (101) and are located at positions where each thermal vias are to be produced, characterized by the following steps: - applying a first and a second solder mask (21, 31) on the underside (A) or Top side (B), wherein the first solder mask (21) at the preformed holes (11-14) each around the edge (22) of each hole on the bottom of a solder mask free area (23), wherein the second solder mask (31) at least a majority, preferably at each, of the preformed bores (11-14) each extend at least to the edge (32) of the bore on the upper side; - Lot (16) on the bottom (A) and reflow soldering of the solder, wherein the solder penetrates into the bores (11-14) and on the bottom (A) convex, the edge (22) of the respective holes superior Menisci ( 26) is formed; and - exposing regions (35) on the top side (B), which regions are predetermined for contacting at least one electronic component (18) on top and each comprise at least one of the thermal vias, by removing the second solder mask (31) at least in said areas.
    [2]
    2. The method according to claim 1, characterized in that the first solder mask (21) which are free of solder resist areas (23) are designed annular.
    [3]
    3. The method according to claim 2, characterized in that the free of solder mask areas (23) immediately adjacent holes touch each other, whereby between the free areas (25) are formed with solder mask, preferably the shape of confined by concave curve segments squares or Have triangles.
    [4]
    4. The method according to any one of the preceding claims, characterized in that the second solder mask (31) extends at least a portion of said holes over the edge (32) and there each forms a freestanding inwardly projecting ring (34).
    [5]
    5. The method according to any one of the preceding claims, characterized in that the second solder mask (31) in at least a portion of said holes at the edge (32) comes close, in these holes, the edge (33) of the second solder mask with the edge (32 ) of the bore is aligned.
    [6]
    6. The method according to any one of the preceding claims, characterized in that the carrier plate during the step of applying solder with the bottom (A) is kept oriented upward.
    [7]
    7. The method according to any one of the preceding claims, characterized by the subsequent additional step: - equipping the upper side (B) with at least one electronic component (18) on the exposed areas (35) for contacting.
    [8]
    8. The method according to any one of the preceding claims, characterized in that during reflowing of the solder on the underside (A) resulting menisci (26) form convex calottes in each case over the holes.
    [9]
    A method according to any one of the preceding claims, characterized by the additional step of: - lining the preformed holes (11-14) with a metal, preferably a metal of high electrical conductivity, e.g. Copper, and preferably by a galvanic process.
    [10]
    10. The method according to any one of the preceding claims, characterized in that during the reflow soldering of the solder holes (11-14), in which the solder (16) penetrates, are filled by the solder (16).
    [11]
    11. printed circuit board (1) having a plurality of formed in a support plate (10) of the printed circuit board thermal vias (19) which extend along bores (20) between a bottom (A) and an upper side (B) of the support plate (10 ), characterized in that the thermal vias on the underside (A) have convex, the edge of the respective bores (20) superior Menisci (26), and on the upper side (B) of a solder mask (37) exempted areas ( 35) are provided, which regions (35) are provided with soldering material for contacting at least one electronic component (18) on the upper side and are in soldered connection with at least one of the thermal plated-through holes (19).
    [12]
    12. Printed circuit board according to claim 11, characterized in that on the underside (A), the menisci (26) are circular, and preferably the menisci (26) immediately adjacent holes touch each other, wherein between these meniscuses each areas (25) lie with solder mask , which are preferably in the form of quadrilaterals or triangles delimited by concave curve segments.
    [13]
    13. Printed circuit board according to claim 11 or 12, characterized in that the menisci (26) by solder material (16) are formed, which at the same time fills the holes (20).
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    同族专利:
    公开号 | 公开日
    AT520301B1|2019-03-15|
    CN111201840A|2020-05-26|
    US20200236775A1|2020-07-23|
    JP2020537819A|2020-12-24|
    EP3695691A1|2020-08-19|
    US11116071B2|2021-09-07|
    WO2019071283A1|2019-04-18|
    JP6953630B2|2021-10-27|
    KR20200063181A|2020-06-04|
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    申请号 | 申请日 | 专利标题
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    US16/754,693| US11116071B2|2017-10-12|2018-10-08|Method for producing a printed circuit board having thermal through-contacts|
    PCT/AT2018/060235| WO2019071283A1|2017-10-12|2018-10-08|Method for producing a printed circuit board having thermal through-contacts, and printed circuit board|
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